For my microelectronics class, a design problem was assigned. The diagram was given, along with a set of specs. Gate lengths and widths for each MOSFET and base-bmitter junction area for each BJT needed to be chosen. The device contains a total of 24 transistors.
The Q1-Q4 stack (on the left of the primary diagram) create DC biases A and B, which sets the current bias in each of the five stages of the amplifier. Stage one uses an active Lee Load to provide high differential mode gain and low common mode gain. Stage two uses a current mirror load to further amplify differential mode signals and attenuate common mode signals. It also brings the two inputs together into one output. The final three stages don't provide much gain, but drive the external load.
I wrote a set of MATLAB scripts to "simulate" each stage, give me some relevant node voltages for extreme inputs, and tell me the performance parameters for transistor dimensions that I was testing. Functions within these scripts did all the solving and calculations for me, so iterations and experimentation in my design were easy to test. I am well aware that software for this exists already; but I did not have easy access to it and I wanted to do it my own way.
For the sake of preventing future students from finding this, my full solution and code is not posted here. The diagrams are from a handout courtesy of Professor Clifton Fonstad.